Sealsq deepens tech focus on CMOS-compatible quantum architectures

SEALSQ (LAES) announced an increased technology-driven focus on semiconductor CMOS-compatible quantum computing architectures. This strategic emphasis reflects SEALSQ’s conviction that long-term quantum scalability will be achieved through deep alignment with semiconductor technology. By prioritizing silicon spin qubits and electrons-on-helium platforms, SEALSQ is concentrating its investments on qubit technologies that can be fabricated, integrated, and scaled using established semiconductor CMOS processes and manufacturing capabilities. Both silicon spin qubits and electrons-on-helium platforms approaches are promising for semiconductor CMOS-compatible quantum computing: silicon spin qubits use electrons in silicon and can be made with chip-making methods similar to CMOS, which may help with scaling and manufacturing, while electrons-on-helium qubits use electrons above superfluid helium on a silicon chip and can use CMOS-compatible controls, offering a low-noise alternative approach. CMOS compatibility is not just a technology or manufacturing preference; it is a system-level enabler. Quantum processors require dense arrays of control electrodes, high-speed signal routing, cryogenic-compatible electronics, and precise calibration and monitoring infrastructure. Silicon-based quantum platforms offer a credible path to the co-design and eventual co-integration of quantum devices with classical CMOS control circuitry. In this context, FDSOI appears to be a strong compromise for achieving acceptable noise and power consumption levels. FDSOI is a wafer-level semiconductor technology that uses a thin silicon layer on an insulating layer to reduce power consumption and noise.