New updates have been reported about Navitas.
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Navitas Semiconductor has introduced its 5th-generation GeneSiC silicon carbide platform, a 1200 V high-voltage MOSFET family built on a new Trench-Assisted Planar architecture that materially advances performance versus its prior 1200 V technology. The design blends a planar gate with a trench structure in the source region, delivering a roughly 35% improvement in the RDS,ON × QGD figure of merit and about a 25% better QGD / QGS ratio, which together cut switching losses, enable higher-frequency operation, and support cooler, more compact power stages in demanding applications.
The new devices are positioned as a core enabler for AI data centers, energy and grid infrastructure, and broader industrial electrification, complementing Navitas’ existing 2300 V and 3300 V ultra-high-voltage SiC portfolio and reinforcing its strategy to span the full medium-voltage range. Stability and robustness are central to the platform, with a higher threshold voltage (VGS,TH ≥ 3 V) to reduce parasitic turn-on risk, optimized RDS(ON) × EOSS characteristics, and an integrated “Soft Body-Diode” feature designed to limit EMI and ensure smooth commutation under high-speed switching. Navitas labels the platform “AEC-Plus,” indicating it exceeds standard AEC-Q101 and JEDEC reliability criteria based on internal testing, which is critical for long-life infrastructure and data center deployments. Management signaled that additional 5th-generation GeneSiC products will be rolled out over the coming months, and is supporting the launch with a technical white paper for design teams, underscoring that the SiC roadmap is a strategic growth vector alongside the company’s GaNFast portfolio in next-generation power electronics.

